1. First check the RAM and flop max supporting frequency.

2. Get the avg delay value for cell and calculate the logic depth it can have.

3. You also need to check feasibility of skewing the path with high logic depth.

It highly recommended to first approximate with above parameters and start the trail run.

Alternatively, If you have a run with is already which sta session. For that you can adjust setup uncertainty value and fix the path.

There are some other parameters also which need to be considered but these are preliminary things which need to be consider first. 😀